Read/write/restore circuit for memory arrays

A read/write/restore circuit is disclosed for use in a memory array such as a static RAM array. The circuit employs data and data-complement signals having three states in combination with a two-state address signal to perform read, write and restore functions for the array, to reduce the number of...

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Bibliographic Details
Main Author MONTEGARI; FRANK A
Format Patent
LanguageEnglish
Published 07.11.1995
Edition6
Subjects
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:A read/write/restore circuit is disclosed for use in a memory array such as a static RAM array. The circuit employs data and data-complement signals having three states in combination with a two-state address signal to perform read, write and restore functions for the array, to reduce the number of components and control lines needed. The circuit is preferably implemented in BICMOS technology.
Bibliography:Application Number: US19910808047