Memory device with current path cut-off circuit for sense amplifier

A memory device has memory cells each of which is addressed according to a timing signal, current sense amplifiers each of which determines whether a current flows in the addressed memory cell or not and reads-out the data stored in such memory cell, a circuit which generates a control signal to bec...

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Bibliographic Details
Main Author HIKICHI; HIROSHI
Format Patent
LanguageEnglish
Published 17.10.1995
Edition6
Subjects
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Summary:A memory device has memory cells each of which is addressed according to a timing signal, current sense amplifiers each of which determines whether a current flows in the addressed memory cell or not and reads-out the data stored in such memory cell, a circuit which generates a control signal to become active at a timing when the memory cell Is addressed and to become inactive after the read-out of the stored data is completed by the current sense amplifier, and a circuit which cuts-off based on the control signal a current path of a steady-state current flowing in the current sense amplifier. It is possible to substantially reduce power consumption without sacrificing the capability of the read-out the stored data at a high speed.
Bibliography:Application Number: US19910686118