Memory precharge technique

An integrated circuit memory array includes column conductors that are precharged during a precharge period in order to reduce the effects of power supply voltage variations, a load resistor is connected between the column conductors and ground during a portion of the precharge period. In this manne...

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Bibliographic Details
Main Author LEE; KANG W
Format Patent
LanguageEnglish
Published 02.05.1995
Edition6
Subjects
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:An integrated circuit memory array includes column conductors that are precharged during a precharge period in order to reduce the effects of power supply voltage variations, a load resistor is connected between the column conductors and ground during a portion of the precharge period. In this manner, a voltage-divider is formed that provides a discharge path which prevents over-charging of the column conductors. An increase in power supply noise immunity is gained, thereby avoiding degradation of the worst-case memory access time that could otherwise occurs.
Bibliography:Application Number: US19940219059