Data processing system having multiple register management for call and return operations

In a computer system equipped with a large number of registers which have an access time much shorter than that of a main memory, a register designating address part in which the assignment of an area register having a register address of a register area as its value and the assignment of a register...

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Bibliographic Details
Main Authors KURAKAZU; KEIICHI, WATANABE; TAN, KASHIWAGI; YUGO, NOJIRI; TOHRU, TOYAMA; KEISUKE
Format Patent
LanguageEnglish
Published 26.04.1994
Edition5
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:In a computer system equipped with a large number of registers which have an access time much shorter than that of a main memory, a register designating address part in which the assignment of an area register having a register address of a register area as its value and the assignment of a register displacement value expressing a relative register address within the register area are combined is provided in each instruction so that, even when physical registers are increased, save and restore of registers attendant upon task switches, etc. may be lessened to attain a raised speed of program run processing. Besides, an address part for designating main memory is provided in the same instruction.
Bibliography:Application Number: US19920945930