Data processing system having a programmable mode for selecting operation at one of a plurality of power supply potentials
A data processing system (10) has programmable normal and low voltage modes of operation. The normal voltage mode of operation enables precharge transistors (32, 34) to couple a voltage of (VDD-Vtn) to each of a plurality of precharge circuit nodes, such as precharge bus (30), within data processing...
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Main Authors | , |
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Format | Patent |
Language | English |
Published |
23.11.1993
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Edition | 5 |
Subjects | |
Online Access | Get full text |
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Summary: | A data processing system (10) has programmable normal and low voltage modes of operation. The normal voltage mode of operation enables precharge transistors (32, 34) to couple a voltage of (VDD-Vtn) to each of a plurality of precharge circuit nodes, such as precharge bus (30), within data processing system (10). During the low voltage mode of operation, the full VDD is coupled to each precharge circuit node, wherein the power supply voltage during the low voltage mode of operation is reduced. Data processing system (10) has a voltage mode bit (36) for receiving voltage mode information from a source external to data processing system (10). In response to an active logic state within voltage mode bit (36), a low voltage mode clocking circuit (42) is enabled. |
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Bibliography: | Application Number: US19910724260 |