Combinational data generator and analyzer for built-in self test

A built-in self test (BIST) circuit verifies the operation of a circuit under test in an integrated circuit. The BIST generates a series of test vectors with linear feedback shift register (LFSR) and applies the test vectors to the circuit under test. The output signal from the circuit under test in...

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Bibliographic Details
Main Authors CABY; GLEN D, SPENCE; NICHOLAS J. M
Format Patent
LanguageEnglish
Published 02.11.1993
Edition5
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
TESTING
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Summary:A built-in self test (BIST) circuit verifies the operation of a circuit under test in an integrated circuit. The BIST generates a series of test vectors with linear feedback shift register (LFSR) and applies the test vectors to the circuit under test. The output signal from the circuit under test in response to the test vectors is routed back and accumulating in a predetermined manner in the LFSR for providing a test signature. Thus, the same components in the LFSR generating the test vector also perform the accumulation of the test signature. The accumulating test signature may be used as a subsequent test vector.
Bibliography:Application Number: US19910790844