SHARED SENSE AMPLIFIER TYPE SEMICONDUCTOR MEMORY DEVICE

A semiconductor memory device with two memory cell arrays. Memory cell arrays are commonly provided with a group of sense amplifiers. Each sense amplifier of a group of sense amplifiers is connected to a corresponding bit line pair within one memory cell array through a transmission transistor pair...

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Bibliographic Details
Main Author IKEDA; YUTO
Format Patent
LanguageEnglish
Published 07.09.1993
Subjects
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:A semiconductor memory device with two memory cell arrays. Memory cell arrays are commonly provided with a group of sense amplifiers. Each sense amplifier of a group of sense amplifiers is connected to a corresponding bit line pair within one memory cell array through a transmission transistor pair formed of N channel MOS transistors, and connected to a corresponding bit line pair within the other memory cell array through a transmission transistor pair formed of P channel MOS transistors. The same control signals are applied to gates of these transmission transistor pairs. The control signals maintain 1/2xVcc level during a precharge period, and rise to high levels or fall down to low levels.
Bibliography:Application Number: US19910794269