NONVOLATILE DIFFERENTIAL MEMORY DEVICE AND METHOD

A nonvolatile memory device (10) comprises first and second transistors (M10, M11) connected between respective first and second terminals and a reference potential terminal (12), the transistors (M10, M11) having first and second floating gates, (G10, G11) respectively, for storing complementary ch...

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Bibliographic Details
Main Authors TURI; RAYMOND A, YAKURA; JAMES P, STANCHAK; CARL M
Format Patent
LanguageEnglish
Published 01.12.1992
Subjects
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:A nonvolatile memory device (10) comprises first and second transistors (M10, M11) connected between respective first and second terminals and a reference potential terminal (12), the transistors (M10, M11) having first and second floating gates, (G10, G11) respectively, for storing complementary charges. The device (10) further comprises first and second input lines (14, 16) capacitively coupled by thin oxide capacitors to the gates (G10, G11), and means for providing a biasing voltage slightly in excess of the threshold voltage of the transistors (M10, M11) to the input lines (14, 16), such that the device continues to function in the event of a thin oxide failure.
Bibliography:Application Number: US19890442809