Semiconductor package with ground plane

• Main Authors: STARR; STEPHEN G, PHELPS, JR.; DOUGLAS W, KARNER; FRIEDRICH A, WARD; WILLIAM C
• Format: Patent
• Language: English
• Published: 23.10.1990
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

A plastic encapsulated semiconductor package (42) in which the connecting lead frame members (10) are deposited over the surface of the device (14) together with a covering ground plane (12) so as to provide enhanced electrical and thermal coupling of the members and the device and so reduce the signal to noise ratio by a factor of greater than three over that available in other similar plastic encapsulated packages while simultaneously improving the transfer of heat out of the package. In particular, a lead frame having a plurality of conductors is attached to a major active surface of a semiconductor chip via a ground plane which, in the preferred embodiment, is a multilayered structure containing an insulated integral, uniform ground plane positioned between the lead frame and the chip and adhesively and insulatively joined to both of them. Wires connect terminals on the major active surface of the semiconductor chip to the ground plane and to selective lead frame conductors. The lead frame, the ground plane structure, the semiconductor chip, and the wires which connect the semiconductor chip terminals to the ground plane and to selected lead frame conductors are encapsulated with a suitable insulating material to form a semiconductor module or package.