Multi-chip interconnection package

A package for interconnecting a plurality of integrated circuit chips into a functional unit comprising a multilayer substrate having ground and power conducting layers and a frame for holding the chips with their terminal pads on the side of the frame opposite the substrate. Power and ground termin...

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Bibliographic Details
Main Authors GLASCOCK, II; HOMER H, CARLSON; RICHARD O, EICHELBERGER; CHARLES W, WOJNAROWSKI; ROBERT J, LEVINSON; LIONEL M, NEUGEBAUER; CONSTANTINE A
Format Patent
LanguageEnglish
Published 13.02.1990
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:A package for interconnecting a plurality of integrated circuit chips into a functional unit comprising a multilayer substrate having ground and power conducting layers and a frame for holding the chips with their terminal pads on the side of the frame opposite the substrate. Power and ground terminal pads on the chips are coupled to the appropriate potentials via registering conductive feedthroughs passing through the frame and into the substrate into contact with appropriate power or conductive layers in the substrate. Signal pads on the chips are interconnected by means of a conductive layer which is located over the chips on the side of the frame opposite the substrate.
Bibliography:Application Number: US19880285363