Semiconductor defect monitor for diagnosing processing-induced defects

A semiconductor-processing defect monitor construction for diagnosing processing-induced defects. The semiconductor-processing defect monitor utilizes an array layout and includes continuity defect monitoring structures and short-circuit defect monitoring structures. Once a defect has been indicated...

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Bibliographic Details
Main Author SPROGIS; EDMUND J
Format Patent
LanguageEnglish
Published 31.01.1989
Edition4
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
INFORMATION STORAGE
MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
SEMICONDUCTOR DEVICES
STATIC STORES
TESTING
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Summary:A semiconductor-processing defect monitor construction for diagnosing processing-induced defects. The semiconductor-processing defect monitor utilizes an array layout and includes continuity defect monitoring structures and short-circuit defect monitoring structures. Once a defect has been indicated by a testing operation, the array layout associated with the defect monitor can be used quickly to determine the approximate location of the known defect, thereby facilitating prompt visual observation of the known defect and, thus, prompt determination of the appropriate corrective action to be applied before substantial continued manufacturing has occurred.
Bibliography:Application Number: US19870042906