Reducing noise in introducing bias charge into charge transfer devices
A bias charge (commonly known as a "fat zero") is divided into a plurality, n, of equal parts. These equal parts are differentially delayed, and the results appearing parallel in time are summed to generate a bias charge with reduced noise. The reduced-noise bias charge is then applied to...
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Main Author | |
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Format | Patent |
Language | English |
Published |
10.09.1985
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Edition | 3 |
Subjects | |
Online Access | Get full text |
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Summary: | A bias charge (commonly known as a "fat zero") is divided into a plurality, n, of equal parts. These equal parts are differentially delayed, and the results appearing parallel in time are summed to generate a bias charge with reduced noise. The reduced-noise bias charge is then applied to an input of a charge transfer device - e.g., one of the charge coupled device (CCD) analog shift registers used in a CCD imager to transport charge packets descriptive of picture elements in an imager. |
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Bibliography: | Application Number: US19830497403 |