Method for manufacturing an electrical interconnection by selective tungsten deposition

A structure for an electrical interconnection suitable for a semiconductor integrated circuit is made by a process utilizing selective tungsten deposition at low pressure to form an intermediate conductive layer without significantly ablating nearby insulating material.

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Bibliographic Details
Main Author BROADBENT; ELIOT K
Format Patent
LanguageEnglish
Published 14.05.1985
Edition3
Subjects
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Summary:A structure for an electrical interconnection suitable for a semiconductor integrated circuit is made by a process utilizing selective tungsten deposition at low pressure to form an intermediate conductive layer without significantly ablating nearby insulating material.
Bibliography:Application Number: US19830490381