Interconnection and addressing scheme for LCDs
Liquid crystal elements are interconnected in an array of rows and columns, which are not independent of one another, and are addressed by pulsed signals which together reduce the number of leads N required to operate the display. The interconnection scheme includes connecting together the last colu...
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Main Author | |
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Format | Patent |
Language | English |
Published |
26.03.1985
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Edition | 3 |
Subjects | |
Online Access | Get full text |
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Summary: | Liquid crystal elements are interconnected in an array of rows and columns, which are not independent of one another, and are addressed by pulsed signals which together reduce the number of leads N required to operate the display. The interconnection scheme includes connecting together the last column to the second row, the penultimate column to the third row, etc., and the first column to the last row. In one embodiment for randomly accessing the display, the addressing scheme divides a row-select signal and a column-select signal into two time-wise sequential subsets: a first subset which includes pulses of one polarity in the time slots corresponding to the elements in that row, and a second subset which includes pulses of either polarity depending on which elements in that column are to be turned on and which off. The coincidence of two pulses of opposite polarity applied to an element from the row-select and column-select signals in sufficent to turn on that element. Different addressing schemes are utilized in other embodiments for use as pseudo-analog pointer displays and bargraph displays. |
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Bibliography: | Application Number: US19830492458 |