Method of making conductive paths through a lamina in a semiconductor device

• Main Author: MORITZ; HOLGER
• Format: Patent
• Language: English
• Published: 29.03.1983
• Subjects: BASIC ELECTRIC ELEMENTS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS; PRINTED CIRCUITS; SEMICONDUCTOR DEVICES; TECHNICAL SUBJECTS COVERED BY FORMER USPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ARTCOLLECTIONS [XRACs] AND DIGESTS

On the layer 12 a mask 3 corresponding to the desired pattern of holes 15 is provided with via openings 14 having overhanging walls. The layer 12 is selectively etched with a method where the etching attack takes place vertically to the layer surface, and wherein the mask 3 is thinned simultaneously, so that holes 15 are obtained having a cross-section increasing toward the mask 3. If subsequently material 16 for filling the holes 15 is applied in a blanket deposition these holes are completely filled when the material 16 has the same thickness as the layer 12 although the openings over the holes are decreasing with increasing thickness of the material 16. The layer 12 consists preferably of an insulation material, the mask 3 of positive photoresist, and the material 16 of a metal.