Data processing apparatus providing autoloading of memory pointer registers

A Central Processing Unit (CPU) provides programmable autoloading of memory pointer registers. The CPU includes an op-code extension register (OER) to store a code specifying the autoloading status of each memory pointer register. Whether or not a particular memory pointer register is loaded at the...

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Bibliographic Details
Main Authors COPP, DAVID H, BLAHUT, DONALD E, STANZIONE, DANIEL C
Format Patent
LanguageEnglish
Published 10.02.1981
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:A Central Processing Unit (CPU) provides programmable autoloading of memory pointer registers. The CPU includes an op-code extension register (OER) to store a code specifying the autoloading status of each memory pointer register. Whether or not a particular memory pointer register is loaded at the end of an instruction cycle with an operand address carried by the current instruction depends on the binary state of a particular bit position in the OER corresponding to the particular memory pointer register. The contents of the OER can be changed by means of an instruction for transferring a new code to OER. A CPU architecture having an OER permits software specification of autoloading without significantly increasing the number of op-codes required to define the instruction set. Fewer op-codes generally permit shorter instructions. The advantages provided by shorter instructions are reduced memory overhead for program storage and increased processing efficiency in data processing systems having a small word size.
Bibliography:Application Number: US19780974363