Bus steering structure for low cost pipelined processor system

Logic circuitry is provided for controlling the transfer of data between 1) a low cost pipelined processor and its associated memory, 2) between the processor and input/output devices, and 3) between the input/output devices and memory. A plurality of unidirectional busses are provided to interface...

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Bibliographic Details
Main Authors HORNUNG; LOUIS MICHAEL, COCKERILL; WILLIAM CLYDE, JOHNSON; DONAVON WILLIAM, VRBA; RICHARD ALAN
Format Patent
LanguageEnglish
Published 08.11.1977
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Summary:Logic circuitry is provided for controlling the transfer of data between 1) a low cost pipelined processor and its associated memory, 2) between the processor and input/output devices, and 3) between the input/output devices and memory. A plurality of unidirectional busses are provided to interface the processor and memory and a bidirectional buss is provided to interface with the input/output devices. The logic circuitry provides a control function to steer data over the proper buss structures interconnecting the processor, the memory and the input/output devices and provides those interconnections in a manner which allows the processor to overlap input and output functions.
Bibliography:Application Number: US19760693821