Dual two-phase clock system

A new and improved clock system is described which is effective to substantially increase speed of operation of logic circuits without the need for additional power. That system includes the use of two sets of like phased clock signals, one of which is applied to the internal circuitry and the other...

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Bibliographic Details
Main Author WUNNER; JOHN J
Format Patent
LanguageEnglish
Published 12.10.1976
Subjects
BASIC ELECTRONIC CIRCUITRY
ELECTRICITY
INFORMATION STORAGE
PHYSICS
PULSE TECHNIQUE
STATIC STORES
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Summary:A new and improved clock system is described which is effective to substantially increase speed of operation of logic circuits without the need for additional power. That system includes the use of two sets of like phased clock signals, one of which is applied to the internal circuitry and the other of which controls the input and output stages of the circuit. By apportioning the capacitive load on the clock generator, the slower switching input and output circuitry is provided with faster switching clock signals exhibiting increased usable clock time while the faster switching internal circuitry is provided with less usable clock time. As a result, the available clock power is used to maximum efficiency and circuit speed is increased to the limit of the switching capabilities of the internal circuitry.
Bibliography:Application Number: US19740449939