SELF-ADDRESSING MEMORY
Self-Addressing Dynamic Random Access Memory (SADRAM) includes Dynamic Random Access Memory (DRAM) and a logic layer having direct access to the DRAM which provides symbolic addressing services. These services are provided by sequencers realized in the logic layer. The sequencers maintains a DRAM ro...
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Main Author | |
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Format | Patent |
Language | English |
Published |
23.01.2025
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Subjects | |
Online Access | Get full text |
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Summary: | Self-Addressing Dynamic Random Access Memory (SADRAM) includes Dynamic Random Access Memory (DRAM) and a logic layer having direct access to the DRAM which provides symbolic addressing services. These services are provided by sequencers realized in the logic layer. The sequencers maintains a DRAM row or row-pair in sorted order, finds a location within the row or row-pair for a new data element, and inserts the new data element into the row or row-pair-all while preserving the sorted order. The sequencer is a plurality sequencer groups, each sequencer group is a plurality of sequencer cells. The sequencer cells to perform a highly parallel pipeline insertion of a new data element. The logic layer also defines a Self-Addressing Memory Central Processing Unit (SamPU) which is operatively coupled to the sequencer and configured to control the sequencer. The logic layer also provides program memory for SamPU and a memory cache in which is built an index database. The database is managed by the SamPU and the sequencers. It is subject to mitosis to accommodate the overflow of any item in the index database. |
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Bibliography: | Application Number: US202318384655 |