VERTICAL SEMICONDUCTOR PACKAGE INCLUDING HORIZONTALLY STACKED DIES AND METHODS OF FORMING THE SAME

A semiconductor package includes a first connection die including a semiconductor substrate and an interconnect structure, and a first die stack disposed on the first connection die and including stacked dies, each of the stacked dies including a semiconductor substrate and an interconnect structure...

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Bibliographic Details
Main Authors CHANG, Jen-Yuan, LAI, Chia-Ping
Format Patent
LanguageEnglish
Published 07.11.2024
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:A semiconductor package includes a first connection die including a semiconductor substrate and an interconnect structure, and a first die stack disposed on the first connection die and including stacked dies, each of the stacked dies including a semiconductor substrate and an interconnect structure including a first connection line that is electrically connected to the interconnect structure of the first connection die. An angle formed between a plane of the first connection die and a plane of each stacked die ranges from about 45° to about 90°.
Bibliography:Application Number: US202418779024