THREE-DIMENSIONAL INTEGRATED CIRCUIT STRUCTURES AND METHODS OF FORMING THE SAME

Board substrates, three-dimensional integrated circuit structures and methods of forming the same are disclosed. A board substrate includes a core layer, a first build-up layer, a second build-up layer, a first group of bumps, a second first group of bumps and at least one first underfill blocking w...

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Bibliographic Details
Main Authors Huang, Ping-Kang, Lu, Chung-Yu, Chiu, Sao-Ling
Format Patent
LanguageEnglish
Published 07.11.2024
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:Board substrates, three-dimensional integrated circuit structures and methods of forming the same are disclosed. A board substrate includes a core layer, a first build-up layer, a second build-up layer, a first group of bumps, a second first group of bumps and at least one first underfill blocking wall. The first build-up layer and the second build-up layer are disposed on opposite sides of the core layer. The first group of bumps is disposed over the first build-up layer. The second first group of bumps is disposed over the first build-up layer. The at least one first underfill blocking wall is disposed over the first build-up layer and between the first group of bumps and the second group of bumps.
Bibliography:Application Number: US202418776182