Adaptive Configuration of Address Translation Cache

A peripheral device includes a bus interface and an Address Translation Service (ATS) controller. The bus interface is to communicate over a peripheral bus. The ATS controller is to communicate over the peripheral bus, including sending address translation requests and receiving address translations...

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Bibliographic Details
Main Authors Marcovitch, Daniel, Aisman, Shay, Koren, Ran Avraham, Sharaffy, Amir, Shalom, Gal, Shahar, Ariel
Format Patent
LanguageEnglish
Published 17.10.2024
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:A peripheral device includes a bus interface and an Address Translation Service (ATS) controller. The bus interface is to communicate over a peripheral bus. The ATS controller is to communicate over the peripheral bus, including sending address translation requests and receiving address translations in response to the address translation requests, to cache at least some of the address translations in one or more Address Translation Caches (ATCs), to estimate one or more statistical properties of the received address translations, and to configure the one or more ATCs based on the one or more statistical properties.
Bibliography:Application Number: US202318299732