MEMORY DEVICE

A memory device is disclosed. The memory device includes a first cell region including first memory strings, a second cell region attached to the first cell region and including second memory strings, and a peripheral circuit region attached to the first cell region and including a peripheral circui...

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Bibliographic Details
Main Authors BYEON, Daeseok, FUTATSUYAMA, Takuya
Format Patent
LanguageEnglish
Published 22.08.2024
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:A memory device is disclosed. The memory device includes a first cell region including first memory strings, a second cell region attached to the first cell region and including second memory strings, and a peripheral circuit region attached to the first cell region and including a peripheral circuit configured to control the first and second memory strings, the first cell region including a low-level bit line electrically connected to the first memory strings, a low-level bonding pad provided between the peripheral circuit region and the first cell region, a low-level connection via connected to the low-level bonding pad, a high-level bonding pad provided between the first and second cell regions, the second cell region including a high-level bit line electrically connected to the second memory strings, and a high-level connection via connected to the high-level bonding pad and being laterally offset from the low-level connection via.
Bibliography:Application Number: US202418583467