SEMICONDUCTOR MEMORY DEVICES

A semiconductor memory device, which may include a substrate, a lower conductive line on the substrate, an isolation insulating layer on the lower conductive line and including a channel trench, a channel structure inside the channel trench and including a first oxide semiconductor material, an inte...

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Bibliographic Details
Main Authors Jung, Wooje, Lee, Juho, Kim, Seunghyun, Cho, Minhee, Lee, Wonsok
Format Patent
LanguageEnglish
Published 15.08.2024
Subjects
ELECTRICITY
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Summary:A semiconductor memory device, which may include a substrate, a lower conductive line on the substrate, an isolation insulating layer on the lower conductive line and including a channel trench, a channel structure inside the channel trench and including a first oxide semiconductor material, an interfacial conductive pattern between the lower conductive line and a lower surface of the channel structure, a gate dielectric layer that covers the channel structure within the channel trench, an upper conductive line on the gate dielectric layer within the channel trench, a conductive contact pattern on the channel structure, an interfacial oxide semiconductor pattern between the channel structure and the conductive contact pattern and including a second oxide semiconductor material, and a capacitor structure including a lower electrode connected to the conductive contact pattern.
Bibliography:Application Number: US202318517126