METHOD FOR PREPARING SHIELDED GATE SEMICONDUCTOR DEVICE STRUCTURE, AND SHIELDED GATE SEMICONDUCTOR DEVICE STRUCTURE
A method for preparing a shielded gate semiconductor device structure, and a shielded gate semiconductor device structure. The following steps are added in between source polycrystalline silicon deposition and gate polycrystalline silicon oxidation: removing, by etching, a first oxide layer and a se...
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Main Authors | , , , , |
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Format | Patent |
Language | English |
Published |
15.08.2024
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Subjects | |
Online Access | Get full text |
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Summary: | A method for preparing a shielded gate semiconductor device structure, and a shielded gate semiconductor device structure. The following steps are added in between source polycrystalline silicon deposition and gate polycrystalline silicon oxidation: removing, by etching, a first oxide layer and a second oxide layer that are in a middle upper space of a cell trench and on the surface of a semiconductor material layer, and a portion of the semiconductor material layer between trenches; removing, by etching, the gate polycrystalline silicon until a thickness of remaining gate polycrystalline silicon in the source lead-out region trench reaches a preset thickness; and selectively removing, by etching, remaining gate polycrystalline silicon in the source lead-out region trench until no gate polycrystalline silicon remains in the source lead-out region trench, and then removing the photoresist. |
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Bibliography: | Application Number: US202118570253 |