Semiconductor Devices and Methods of Manufacturing

A device includes a first stack of nanostructures formed over a substrate; a second stack of nanostructures formed adjacent to the first stack; a first gate structure on the nanostructures of the first stack; a second gate structure on the nanostructures of the second stack; a first insulating wall...

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Bibliographic Details
Main Authors Ju, Shi Ning, Cheng, Jung-Chien, Wang, Chih-Hao, Chen, Guan-Lin, Chiang, Kuo-Cheng
Format Patent
LanguageEnglish
Published 01.08.2024
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Summary:A device includes a first stack of nanostructures formed over a substrate; a second stack of nanostructures formed adjacent to the first stack; a first gate structure on the nanostructures of the first stack; a second gate structure on the nanostructures of the second stack; a first insulating wall separating the first gate structure and the second gate structure; a hard mask layer on the first gate structure and on the second gate structure; and a gate contact extending through the hard mask layer to physically and electrically contact the first gate structure.
Bibliography:Application Number: US202318311787