Traffic Isolation at a Chip-To-Chip Gateway of a Data Processing System

A mechanism for error containment in a data processing system includes receiving a transaction request at a gateway between a host and a device, allocating an entry for the request in a local request tracker of the gateway and sending a link request, to a port of the gateway. In response to an isola...

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Bibliographic Details
Main Authors Patel, Apurva, Garg, Surabhi, Tummala, Ashok Kumar, Marri, Sai Kumar, Parshant, FNU, Jain, Rishabh
Format Patent
LanguageEnglish
Published 01.08.2024
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Summary:A mechanism for error containment in a data processing system includes receiving a transaction request at a gateway between a host and a device, allocating an entry for the request in a local request tracker of the gateway and sending a link request, to a port of the gateway. In response to an isolation trigger, the port is moved into isolation by completing in-process requests with entries in the tracker and locking the entries. On receiving a response to an in-process request while the port is in isolation, the response is dropped, the associated entry is unlocked, and allocation of the entry is enabled. A completion response is sent to the requester without dispatching a new link request to the port. When requests are completed, the system is quiesced, locked entries are unlocked, and the port is moved out of isolation.
Bibliography:Application Number: US202318104458