SEMICONDUCTOR MEMORY DEVICE

According to one embodiment, a semiconductor memory device includes a first memory cell; a word line coupled to a gate of the first memory cell; a first transistor having a first end coupled to the word line; and a control circuit configured to, in a read operation, apply a first voltage, which is p...

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Bibliographic Details
Main Author KATAOKA, Hideyuki
Format Patent
LanguageEnglish
Published 18.07.2024
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Summary:According to one embodiment, a semiconductor memory device includes a first memory cell; a word line coupled to a gate of the first memory cell; a first transistor having a first end coupled to the word line; and a control circuit configured to, in a read operation, apply a first voltage, which is positive, to a back gate of the first transistor.
Bibliography:Application Number: US202418621114