SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
A semiconductor structure is provided. The semiconductor structure has a device region and a periphery region adjacent to the device region. The periphery region comprises an array contact defining region and a periphery contact defining region. The semiconductor structure comprises a substrate, a s...
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Main Authors | , |
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Format | Patent |
Language | English |
Published |
11.07.2024
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Subjects | |
Online Access | Get full text |
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Summary: | A semiconductor structure is provided. The semiconductor structure has a device region and a periphery region adjacent to the device region. The periphery region comprises an array contact defining region and a periphery contact defining region. The semiconductor structure comprises a substrate, a staircase structure, an etch stop layer, a plurality of array contacts, and a plurality of periphery contacts. The staircase structure is disposed on the substrate in the periphery region. The staircase structure comprises conductive layers and dielectric layers disposed alternately. The etch stop layer is disposed on the staircase structure in the array contact defining region. The array contacts are disposed on the staircase structure and through the etch stop layer in the array contact defining region. The periphery contacts are through the staircase structure in the periphery contact defining region. |
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Bibliography: | Application Number: US202318150211 |