CLOCK PULSE MANAGEMENT TO REDUCE PEAK POWER LEVELS

Information associated with a power consumption level of a set of components of a controller of a memory device is identified. A determination is made whether the information associated with the power consumption level satisfies one or more conditions. In response to the one or more conditions being...

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Bibliographic Details
Main Authors N S, Niraimathi, Ambula, Sharath Chandra, Matturi, Venkata Kiran Kumar
Format Patent
LanguageEnglish
Published 11.07.2024
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:Information associated with a power consumption level of a set of components of a controller of a memory device is identified. A determination is made whether the information associated with the power consumption level satisfies one or more conditions. In response to the one or more conditions being satisfied, swallowing one or more clock pulses of a clock signal transmitted to at least one component of the set of components of the controller are swallowed.
Bibliography:Application Number: US202318536694