AUTOMATED DESIGN-TO-LITHOGRAPHY AND DESIGN CHECKING FOR STITCHED INTEGRATED CIRCUIT DESIGN

An integrated circuit design is partitioned into a plurality of cells and a plurality of images of a stitched chip design are generated based on the plurality of cells. At least one of the images is wrapped with a chrome border and a blading outline to generate a mask design. Design information is e...

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Bibliographic Details
Main Authors SHAO, DONGBING, Patel, Jyotica, Carniol, April, Brancaccio, James R, Beckley, Michael Justin
Format Patent
LanguageEnglish
Published 04.07.2024
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:An integrated circuit design is partitioned into a plurality of cells and a plurality of images of a stitched chip design are generated based on the plurality of cells. At least one of the images is wrapped with a chrome border and a blading outline to generate a mask design. Design information is extracted from the mask design and the stitched chip design. A scanner job file for fabricating the integrated circuit design is generated based on the extracted design information and the fabrication of an integrated circuit using the scanner job file is facilitated.
Bibliography:Application Number: US202218092130