SEMICONDUCTOR MEMORY DEVICES

A semiconductor memory device includes a substrate including a plurality of active regions in a memory cell region, a plurality of bit line structures extending in parallel with each other in a first horizontal direction in the memory cell region, a plurality of buried contacts respectively and elec...

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Bibliographic Details
Main Authors Choi, Sohee, Lee, Sohyang, Choi, Jinseo, Jin, Jeongmin
Format Patent
LanguageEnglish
Published 13.06.2024
Subjects
ELECTRICITY
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Summary:A semiconductor memory device includes a substrate including a plurality of active regions in a memory cell region, a plurality of bit line structures extending in parallel with each other in a first horizontal direction in the memory cell region, a plurality of buried contacts respectively and electrically connected to the active regions and partially filling a space between the bit line structures, a plurality of lower landing pads in the space between the bit line structures and respectively on the buried contacts, a landing pad insulating structure in contact with the bit line structures and the lower landing pads and including a plurality of landing pad holes, a plurality of upper landing pads respectively filling the landing pad holes and respectively connected to the lower landing pads, and a plurality of capacitor structures.
Bibliography:Application Number: US202318517917