POWER MANAGEMENT OF CHIPLETS WITH VARYING PERFORMANCE

An apparatus and method for efficiently managing performance among replicated modules of an integrated circuit despite manufacturing variations across semiconductor dies. An integrated circuit includes a first module with a first partition of multiple dies that share at least a same first power rail...

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Bibliographic Details
Main Authors Sundaram, Sriram, Kushnir, Stephen, Poirier, Christopher Allan
Format Patent
LanguageEnglish
Published 13.06.2024
Subjects
BASIC ELECTRIC ELEMENTS
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
PHYSICS
SEMICONDUCTOR DEVICES
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Summary:An apparatus and method for efficiently managing performance among replicated modules of an integrated circuit despite manufacturing variations across semiconductor dies. An integrated circuit includes a first module with a first partition of multiple dies that share at least a same first power rail. The integrated circuit also includes a second module with a second partition of multiple dies that share at least a same second power rail different from the first power rail. The dies within partitions have differences in circuit parameters within a threshold such that the dies can be placed in a same first bin. The dies in different partitions belong to different bins. A power manager initially assigns the same operating parameters to the first partition and the second partition, but adjusts the operating parameters based on detection of the different circuit behavior due to manufacturing variations between the first partition and the second partition.
Bibliography:Application Number: US202218065313