SELECTIVELY POWERED EMBEDDED MEMORY SYSTEMS AND METHODS
Various techniques are provided for selectively operating a memory block in full power or half power modes. In one example, a system comprises a memory block configured to be selectively operated in a full power mode or a half power mode. The memory block comprises an input/output port. The memory b...
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Main Authors | , , |
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Format | Patent |
Language | English |
Published |
06.06.2024
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Subjects | |
Online Access | Get full text |
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Summary: | Various techniques are provided for selectively operating a memory block in full power or half power modes. In one example, a system comprises a memory block configured to be selectively operated in a full power mode or a half power mode. The memory block comprises an input/output port. The memory block further comprises a first sub-block configured to be powered on during the full power mode and during the half power mode. The memory block further comprises a second sub-block configured to be powered on during the full power mode and powered off during the half power mode. The memory block further comprises routing hardware configured to pass data between the input/output port and the first and second sub-blocks. Additional systems and methods are also provided. |
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Bibliography: | Application Number: US202318523764 |