MEMORY DEVICE AND METHOD OF FORMING THE SAME
Provided is a memory device including a substrate, a plurality of bit-line structures, a plurality of conductive plugs, and a plurality of conductive pads. The substrate has a plurality of active areas. The plurality of bit-line structures are disposed on the substrate in parallel. The plurality of...
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Main Authors | , |
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Format | Patent |
Language | English |
Published |
30.05.2024
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Subjects | |
Online Access | Get full text |
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Summary: | Provided is a memory device including a substrate, a plurality of bit-line structures, a plurality of conductive plugs, and a plurality of conductive pads. The substrate has a plurality of active areas. The plurality of bit-line structures are disposed on the substrate in parallel. The plurality of conductive plugs are respectively disposed aside the plurality of bit-line structures, and are electrically connected to the plurality of active areas. The plurality of conductive pads are vertically disposed between the plurality of conductive plugs and the plurality of active areas. One of the conductive plugs has a bottom area falls within a range of a top area of a corresponding conductive pad. |
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Bibliography: | Application Number: US202217994393 |