CHIP PACKAGE STRUCTURE AND METHOD FOR PREPARING CHIP PACKAGE STRUCTURE

The invention provide a chip package structure, which includes a first chip and a first hybrid bonding structure. The first chip is connected to another chip through the first hybrid bonding structure. The first hybrid bonding structure includes a first bonding layer. The first bonding layer is disp...

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Bibliographic Details
Main Authors Jiao, Huifang, He, Ran
Format Patent
LanguageEnglish
Published 30.05.2024
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:The invention provide a chip package structure, which includes a first chip and a first hybrid bonding structure. The first chip is connected to another chip through the first hybrid bonding structure. The first hybrid bonding structure includes a first bonding layer. The first bonding layer is disposed on a side away from a substrate of the first chip, and the first bonding layer includes a first insulation material and a plurality of first metal solder pads embedded in the first insulation material. Each of the plurality of first metal solder pads includes a groove structure. A groove bottom of the groove structure is buried in the first insulation material, and a groove opening of the groove structure is exposed to a surface of the first insulation material and is flush with the surface of the first insulation material.
Bibliography:Application Number: US202418437444