NONVOLATILE MEMORY INCLUDING INTERMEDIATE BUFFER AND INPUT/OUTPUT BUFFER AND MEMORY SYSTEM INCLUDING THE NONVOLATILE MEMORY

According to one embodiment, there is provided a nonvolatile memory including a memory cell array, an input/output buffer, one or more intermediate buffers, and a control circuit. The memory cell array includes a plurality of pages. Each of the one or more intermediate buffers is electrically connec...

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Bibliographic Details
Main Authors IWASAKI, Kiyotaka, SHIRAKAWA, Masanobu, KOJIMA, Yoshihisa
Format Patent
LanguageEnglish
Published 30.05.2024
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:According to one embodiment, there is provided a nonvolatile memory including a memory cell array, an input/output buffer, one or more intermediate buffers, and a control circuit. The memory cell array includes a plurality of pages. Each of the one or more intermediate buffers is electrically connected between the memory cell array and the input/output buffer. The control circuit is configured to store, in a first intermediate buffer, data read through sensing operation from a first page out of the plurality of pages in accordance with a first command that includes a sensing operation instruction and designation of the first intermediate buffer among the one or more intermediate buffers.
Bibliography:Application Number: US202418431159