MEMORY DEVICE PERFORMING ECS OPERATION, OPERATION METHOD OF THE MEMORY DEVICE, MEMORY SYSTEM, ELECTRONIC DEVICE, AND ELECTRONIC SYSTEM
A memory device is provided. The memory device includes: a memory cell array including a plurality of memory cell rows; a refresh control circuit configured to output a refresh row address to control a refresh operation to be performed on at least one memory cell row among the plurality of memory ce...
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Main Authors | , , , , , |
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Format | Patent |
Language | English |
Published |
16.05.2024
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Subjects | |
Online Access | Get full text |
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Summary: | A memory device is provided. The memory device includes: a memory cell array including a plurality of memory cell rows; a refresh control circuit configured to output a refresh row address to control a refresh operation to be performed on at least one memory cell row among the plurality of memory cell rows; and a control logic circuit configured to receive, from a memory controller, error check and scrub (ECS) setting data corresponding to a mode among a plurality of modes, store the ECS setting data in a mode register, and provide a target row address of a memory cell row to be refreshed to the refresh control circuit based on a value of the ECS setting data in response to a refresh command provided from the memory controller. |
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Bibliography: | Application Number: US202318234157 |