LEAD FRAME AND MANUFACTURING METHOD THEREOF

A lead frame includes a plurality of lead portions. At least a part of an upper surface of the lead portion and a sidewall surface of the lead portion is a rough surface having been subjected to roughening treatment. A value of a* in a CIELab color space of the rough surface is within a range from 1...

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Main Authors YAMADA, Masahiro, SEKI, Kentarou, SHINOZAKI, Kazuhiro, NAGATA, Masahiro, OKUYAMA, Daisuke, OOUCHI, Kazunori, MATSUI, Hideto, HATSUTA, Chiaki
Format Patent
LanguageEnglish
Published 02.05.2024
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Abstract A lead frame includes a plurality of lead portions. At least a part of an upper surface of the lead portion and a sidewall surface of the lead portion is a rough surface having been subjected to roughening treatment. A value of a* in a CIELab color space of the rough surface is within a range from 12 to 19, and a value of b* is within a range from 12 to 17.
AbstractList A lead frame includes a plurality of lead portions. At least a part of an upper surface of the lead portion and a sidewall surface of the lead portion is a rough surface having been subjected to roughening treatment. A value of a* in a CIELab color space of the rough surface is within a range from 12 to 19, and a value of b* is within a range from 12 to 17.
Author SEKI, Kentarou
SHINOZAKI, Kazuhiro
OKUYAMA, Daisuke
OOUCHI, Kazunori
MATSUI, Hideto
HATSUTA, Chiaki
NAGATA, Masahiro
YAMADA, Masahiro
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– fullname: SHINOZAKI, Kazuhiro
– fullname: NAGATA, Masahiro
– fullname: OKUYAMA, Daisuke
– fullname: OOUCHI, Kazunori
– fullname: MATSUI, Hideto
– fullname: HATSUTA, Chiaki
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Snippet A lead frame includes a plurality of lead portions. At least a part of an upper surface of the lead portion and a sidewall surface of the lead portion is a...
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SubjectTerms BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
Title LEAD FRAME AND MANUFACTURING METHOD THEREOF
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