SCALING FOR DIE-LAST ADVANCED IC PACKAGING

Embodiments of the present disclosure relate to a system, a software application, and methods of digital lithography for semiconductor packaging. The method includes comparing positions of vias and via locations, generating position data based on the comparing the positions of vias and the via locat...

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Bibliographic Details
Main Authors KANG, Chung-Shin, CHEN, Jang Fung, SHEN, Wei-Ning, LAIDIG, Thomas L, TSAI, Chi-Ming
Format Patent
LanguageEnglish
Published 18.04.2024
Subjects
APPARATUS SPECIALLY ADAPTED THEREFOR
CINEMATOGRAPHY
ELECTROGRAPHY
HOLOGRAPHY
MATERIALS THEREFOR
ORIGINALS THEREFOR
PHOTOGRAPHY
PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES,e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTORDEVICES
PHYSICS
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Summary:Embodiments of the present disclosure relate to a system, a software application, and methods of digital lithography for semiconductor packaging. The method includes comparing positions of vias and via locations, generating position data based on the comparing the positions of vias and the via locations, providing the position data of the vias to a digital lithography device, updating a redistributed metal layer (RDL) mask pattern according to the position data such that RDL locations correspond to the positions of the vias, and projecting the RDL mask pattern with the digital lithography device.
Bibliography:Application Number: US202318484016