WIDE BANDGAP TRANSISTOR LAYOUT WITH L-SHAPED GATE ELECTRODES

A transistor comprising a first source region, a first drain region disposed on a first side of the first source region, a first active region being formed between the first source region and the first drain region, a second drain region disposed on a second side of the first source region, a second...

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Bibliographic Details
Main Author Blin, Guillaume Alexandre
Format Patent
LanguageEnglish
Published 04.04.2024
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:A transistor comprising a first source region, a first drain region disposed on a first side of the first source region, a first active region being formed between the first source region and the first drain region, a second drain region disposed on a second side of the first source region, a second active region being formed between the first source region and the second drain region, directions of greatest extension of the first and second active regions being non-parallel, a first gate electrode finger disposed over the first active region, and a second gate electrode finger disposed over the second active region.
Bibliography:Application Number: US202318370144