MEMORY DEVICE AND MANAGEMENT METHOD THEREOF

A memory device and a management method thereof are provided. The memory device includes a controller and at least one memory channel. The memory channel includes at least one memory chip. The at least one memory chip is commonly coupled to the controller through an interrupt signal wire. The at lea...

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Bibliographic Details
Main Authors Lin, Jia-Xing, Juan, Shih-Chou, Liu, Chien-Hsin, Kuo, Nai-Ping, Cheng, Shunli
Format Patent
LanguageEnglish
Published 04.04.2024
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:A memory device and a management method thereof are provided. The memory device includes a controller and at least one memory channel. The memory channel includes at least one memory chip. The at least one memory chip is commonly coupled to the controller through an interrupt signal wire. The at least one memory chip generates at least one local interrupt signal and performs a logic operation on the at least one local interrupt signal to generate a common interrupt signal. The interrupt signal wire is configured to transmit the common interrupt signal to the controller.
Bibliography:Application Number: US202217955555