INSTRUCTION ELIMINATION THROUGH HARDWARE DRIVEN MEMOIZATION OF LOOP INSTANCES

Methods and apparatus for instruction elimination through hardware driven memoization of loop instances. A hardware-based loop memoization technique learns repeating sequences of loops and transparently removes instructions for the loop instructions from instruction sequences while making their outp...

Full description

Saved in:
Bibliographic Details
Main Authors Soundararajan, Niranjan Kumar, Subramoney, Sreenivas, Gaur, Jayesh
Format Patent
LanguageEnglish
Published 28.03.2024
Subjects
Online AccessGet full text

Cover

Loading…
More Information
Summary:Methods and apparatus for instruction elimination through hardware driven memoization of loop instances. A hardware-based loop memoization technique learns repeating sequences of loops and transparently removes instructions for the loop instructions from instruction sequences while making their output available to dependent instructions as if the loop instructions had been executed. A path-based predictor is implemented at the front-end to predict these loop instances and remove their instructions from instruction sequences. A novel memoization prediction micro-operation (Uop) is inserted into the instruction sequence for instances of loops that are predicted to be memoized. The memoization prediction Uop is used to compare the input signature (expected set of input values for the loop) with the actual signature to determine correct and incorrect predictions. The input signature learnt is based on all live-ins of a loop, both explicit register-based live-ins as well as loads to memory in the loop body that determine code path and outputs.
Bibliography:Application Number: US202217951859