DEVICE LAYER INTERCONNECTS

Described herein are integrated circuit (IC) structures, devices, and methods associated with device layer interconnects. For example, an IC die may include a device layer including a transistor array along a semiconductor fin, and a device layer interconnect in the transistor array, wherein the dev...

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Bibliographic Details
Main Authors Bohr, Mark, Nabors, Marni, Kobrinsky, Mauro J
Format Patent
LanguageEnglish
Published 21.03.2024
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Summary:Described herein are integrated circuit (IC) structures, devices, and methods associated with device layer interconnects. For example, an IC die may include a device layer including a transistor array along a semiconductor fin, and a device layer interconnect in the transistor array, wherein the device layer interconnect is in electrical contact with multiple different source/drain regions of the transistor array.
Bibliography:Application Number: US202318520872