MEMORY DEVICE INCLUDING PASS TRANSISTOR CIRCUIT

A memory device includes; a memory cell array including a first memory block and a second memory block adjacently disposed in a first direction, driving signal lines respectively corresponding to vertically stacked word lines, and a pass transistor circuit including an odd number of pass transistor...

Full description

Saved in:
Bibliographic Details
Main Authors Byeon, Daeseok, Jeon, Hongsoo, Kwak, Pansuk, Kim, Seungyeon
Format Patent
LanguageEnglish
Published 29.02.2024
Subjects
Online AccessGet full text

Cover

Loading…
More Information
Summary:A memory device includes; a memory cell array including a first memory block and a second memory block adjacently disposed in a first direction, driving signal lines respectively corresponding to vertically stacked word lines, and a pass transistor circuit including an odd number of pass transistor groups and connected between the driving signal lines and the memory cell array. One of the odd number of pass transistor groups includes a first pass transistor connected between a first word line of the first memory block and a first driving signal line among the driving signal lines, and a second pass transistor connected between a first word line of the second memory block and the first driving signal line adjacently disposed to the first pass transistor in a second direction.
Bibliography:Application Number: US202318504093