SRAM INCLUDING REFERENCE VOLTAGE GENERATOR AND READ METHOD THEREOF
A static random access memory includes a memory cell that stores data, a reference voltage generator that generates a reference voltage, a precharge circuit that is connected with the memory cell through a bit line, is connected with the reference voltage generator through a reference bit line, and...
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Main Authors | , , |
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Format | Patent |
Language | English |
Published |
29.02.2024
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Subjects | |
Online Access | Get full text |
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Summary: | A static random access memory includes a memory cell that stores data, a reference voltage generator that generates a reference voltage, a precharge circuit that is connected with the memory cell through a bit line, is connected with the reference voltage generator through a reference bit line, and pre-charges the bit line and the reference bit line, and a sense amplifier that is connected with the bit line and the reference bit line, compares a voltage of the bit line and a voltage of the reference bit line to generate a comparison result, and determines a value of the data stored in the memory cell based on the comparison result. The reference voltage generator includes first-type transistors. |
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Bibliography: | Application Number: US202318347852 |