METHOD FOR MITIGATING WARPAGE ON STACKED WAFERS

Methods for mitigating warpage on stacked wafers are provided herein. In one example, a method for mitigating warpage on stacked wafers includes depositing a first warpage compensating layer on a backside of a first wafer, stacking an active side of the first wafer on an active side of a second wafe...

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Bibliographic Details
Main Authors KIM, Myongseob, CHANG, Cheang-whang, LIU, Henley
Format Patent
LanguageEnglish
Published 01.02.2024
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:Methods for mitigating warpage on stacked wafers are provided herein. In one example, a method for mitigating warpage on stacked wafers includes depositing a first warpage compensating layer on a backside of a first wafer, stacking an active side of the first wafer on an active side of a second wafer to form a wafer stack having circuitry of the first wafer electrically connected to circuitry of the second wafer, and removing the first warpage compensating layer from the backside of the first wafer prior dicing the wafer stack.
Bibliography:Application Number: US202217875226