GATE-TOP DIELECTRIC STRUCTURE FOR SELF-ALIGNED CONTACT

Semiconductor structures and methods of forming the same are provided. A semiconductor structure according to the present disclosure includes an active region having a channel region and a source/drain region, a gate structure over the channel region, a gate spacer layer disposed over the channel re...

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Bibliographic Details
Main Authors Chen, Yi-Hsien, Li, Chung-Ting, Lin, Ta-Chun, Mor, Yi-Shien, Luo, Wen-Cheng, Chang, Chih-Hao
Format Patent
LanguageEnglish
Published 11.01.2024
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Summary:Semiconductor structures and methods of forming the same are provided. A semiconductor structure according to the present disclosure includes an active region having a channel region and a source/drain region, a gate structure over the channel region, a gate spacer layer disposed over the channel region and extending along a sidewall of the gate structure, an epitaxial source/drain feature over the source/drain region, a contact etch stop layer (CESL) disposed on the epitaxial source/drain feature and extending along a sidewall of the gate spacer layer, a source/drain contact disposed over the epitaxial source/drain feature, and a dielectric cap layer disposed over the gate structure, the gate spacer layer and at least a portion of the CESL. A sidewall of the source/drain contact is in direct contact with a sidewall of the CESL.
Bibliography:Application Number: US202318150900