VERTICAL SEMICONDUCTOR DEVICE

A vertical semiconductor device includes lower circuit patterns disposed on a first substrate. A bonding layer is disposed on the lower circuit patterns. A wire is disposed on the bonding layer. A cell stack structure is disposed on the wire. A base pattern is disposed on the cell stack structure. A...

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Bibliographic Details
Main Authors Kim, Jaeho, Sung, Sukkang, Yang, Woosung, Lee, Ahreum, Gu, Jimo
Format Patent
LanguageEnglish
Published 11.01.2024
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:A vertical semiconductor device includes lower circuit patterns disposed on a first substrate. A bonding layer is disposed on the lower circuit patterns. A wire is disposed on the bonding layer. A cell stack structure is disposed on the wire. A base pattern is disposed on the cell stack structure. An upper insulating layer is disposed on the base pattern. A cell contact plug passes through the cell stack structure and extends to the upper insulating layer. A through-plug is disposed inside a through-hole formed through an outer side of the base pattern to extend to the upper insulating layer. Each of the cell contact plug and the through-plug includes a barrier metal pattern and a metal pattern, and the barrier metal pattern is disposed along sidewalls and bottom surfaces of the cell contact hole and the through-hole.
Bibliography:Application Number: US202318312880