TWO-DIMENSIONAL PMOS DEVICES FOR PROVIDING CMOS IN BACK-END LAYERS OF INTEGRATED CIRCUIT DEVICES

In one embodiment, a transistor device includes a metal layer, a first dielectric layer comprising Hafnium and Oxygen on the metal layer, a channel layer comprising Tungsten and Selenium above the dielectric layer, a second dielectric layer comprising Hafnium and Oxygen on the channel layer, a sourc...

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Main Authors Naylor, Carl Hugo, Steinhardt, Rachel A, Maxey, Kirby, Lee, Sudarat, Avci, Uygar E, Clendenning, Scott B, Dorow, Chelsey, Penumatcha, Ashish Verma, O'Brien, Kevin P, Kitamura, Ande
Format Patent
LanguageEnglish
Published 21.12.2023
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Abstract In one embodiment, a transistor device includes a metal layer, a first dielectric layer comprising Hafnium and Oxygen on the metal layer, a channel layer comprising Tungsten and Selenium above the dielectric layer, a second dielectric layer comprising Hafnium and Oxygen on the channel layer, a source region comprising metal on a first end of the channel layer, a drain region comprising metal on a second end of the channel layer opposite the first end, and a metal contact on the second dielectric layer between the source regions and the drain region. In some embodiments, the transistor device may be included in a complementary metal-oxide semiconductor (CMOS) logic circuit in the back-end of an integrated circuit device, such as a processor or system-on-chip (SoC).
AbstractList In one embodiment, a transistor device includes a metal layer, a first dielectric layer comprising Hafnium and Oxygen on the metal layer, a channel layer comprising Tungsten and Selenium above the dielectric layer, a second dielectric layer comprising Hafnium and Oxygen on the channel layer, a source region comprising metal on a first end of the channel layer, a drain region comprising metal on a second end of the channel layer opposite the first end, and a metal contact on the second dielectric layer between the source regions and the drain region. In some embodiments, the transistor device may be included in a complementary metal-oxide semiconductor (CMOS) logic circuit in the back-end of an integrated circuit device, such as a processor or system-on-chip (SoC).
Author O'Brien, Kevin P
Kitamura, Ande
Steinhardt, Rachel A
Penumatcha, Ashish Verma
Lee, Sudarat
Clendenning, Scott B
Naylor, Carl Hugo
Maxey, Kirby
Dorow, Chelsey
Avci, Uygar E
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– fullname: Avci, Uygar E
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– fullname: Dorow, Chelsey
– fullname: Penumatcha, Ashish Verma
– fullname: O'Brien, Kevin P
– fullname: Kitamura, Ande
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Snippet In one embodiment, a transistor device includes a metal layer, a first dielectric layer comprising Hafnium and Oxygen on the metal layer, a channel layer...
SourceID epo
SourceType Open Access Repository
SubjectTerms BASIC ELECTRIC ELEMENTS
BASIC ELECTRONIC CIRCUITRY
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
PULSE TECHNIQUE
SEMICONDUCTOR DEVICES
Title TWO-DIMENSIONAL PMOS DEVICES FOR PROVIDING CMOS IN BACK-END LAYERS OF INTEGRATED CIRCUIT DEVICES
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